1. Field
Various exemplary embodiments of the present invention relate to a flash memory system and, more particularly, to a flash memory system performing error correction with an error correction code and an operation method thereof.
2. Description of the Related Art
Currently, solid state drives (SSD) preferably use multi-level cell (MLC) flash memory capable of storing multi-bits in a single cell and are thus capable of reducing a production cost per bit. However, when compared with single level cell (SLC) flash memory, the MLC has unstable data security and high error bit probability due to a reduced noise margin among the data stored in memory cell. The Bose-Chadhuri-Hocquenghem (BCH) code, the Reed-Solomon (RS) code, and the hamming code are widely used for detecting and correcting a plurality of error bits.
FIG. 1 is a block diagram illustrating the BCH code decoder. Referring to FIG. 1, an error correction code decoder or the BCH code decoder uses the BCH code. The BCH code has a characteristic guaranteeing error correction of the error bits for as many as the maximum error correction capability “t.” Due to this characteristic, the BCH code is widely used in the SSD as the next generation storage medium. As a number of bits stored in a single MLC increases, the error bit probability increases. Thus, the BCH code is required to have greater error correction capability.
The error correction code decoder includes a syndrome calculation block 11, a key-equation solver block 13, a chien search block 15, and an error correction block 17.
The syndrome calculation block 11 generates syndrome values based on a received codeword. When all of the syndrome values are ‘0’, or the received codeword does not have any error, the codeword is outputted as is without error correction.
However, when one or more of the syndrome values are not ‘0’, the key-equation solver block 13, which uses the Berleykamp-Massey (BM) algorithm or the Euclidian algorithm, generates the error location polynomial (ELP) based on the syndrome values in order to solve the key-equation.
The chien search block 15 calculates locations of errors through the ELP generated by the key-equation solver block 13. The chien search block 15 obtains the locations of errors and the number of the locations of errors by applying Galois Field (GF) elements to the ELP, which is a high-degree equation, determining whether or not the GF elements satisfy the ELP, and finding roots of the ELP.
The error correction block 17 determines whether or not the number of the locations of errors obtained through the Chien search algorithm corresponds to the degree of the ELP, and error-corrects the error bits. In another embodiment, the error correction block 17 ignores failure of the error correction, error-corrects the error bits by flipping all of bit values corresponding to the locations of errors obtained by the chien search block 15, and provides the error-corrected codeword to the host.
When the number of the locations of errors of the received code word is beyond the maximum error correction capability “t” of the BCH code decoder, the key-equation solver block 13 and the chien search block 15 cannot error-correct the errors of the codeword and generate more errors in the codeword. That is, the bit-flip of the values of error bits in the codeword leads to more errors due to erroneous operations of the key-equation solver block 13 and the chien search block 15, and causes incorrect error-decoding with the BCH code at the next stage.